Design of FPGA-based ECG simulator with VHDL
2021
0 views
0 downloads
Advisor: Doç. Dr. İsmail Koyuncu
Abstract (EN)
Functional testing and calibration of medical devices is a routine activity that should be performed periodically. In this direction, digital ECG Simulator test devices that produce vital signs signals have been developed for use in cardiological fields. The device includes a range of normal sinus rhythm, arrhythmia and test waveforms to evaluate the performance of classical and modern ECG (Electrocardiograph) and physiological monitoring systems. In this study, the vital signs Normal Sinus Rhythm, 13 arrhythmic ECG signals (Ventricular Tachycardia, Sinus Bradycardia, Sinus Tachycardia, Supraventricular Tachycardia, Ventricular Paced, Atrial Flutter, First Degree AV Block, Second Degree AV Block Type-1, Ventricular Fibrillation, Premature Ventricular Complex, Atrial Fibrillation, Second-degree AV Block Type-2, Third-degree AV Block), NIBP, ETCO2, and SPO2 signals were first mathematically designed on Matlab and then FPGA (Field Programmable Gate Array) based modeling was done with VHDL (Very High Speed Integrated Circuit Hardware Description Language) in Xilinx-Vivado. The mathematical inference of the signals was created in accordance with the literature and the time and amplitude values of many ECG signals examined from the Physiobank ATM section of the MIT-BIH arrhythmia database. These signals are synthesized for the Zynq7000 XC7Z020 FPGA chip to be used in biomedical calibration applications and ECG simulators, and the vital signs signals modeled by the 14-bit AD9767 DAC (DigitalAnalog Converter) module working in harmony with this development board are observed in real-time over a 4-channel oscilloscope. Matlab-based vital signs signals were taken as reference and compared with the results obtained from FPGA-based vital signs design. The FPGA chip resource consumption values obtained after the Place-Route process, the test results obtained from the design, the MSE (Mean Squared Error) values of the designed signals, the operating frequencies of the system, and each signal are presented. In this study, it has been shown that the hardware designed FPGA-based vital signal generation system can be designed using FPGA chips and can be safely used in ECG Simulators, which play an important role in biomedical calibration applications.
Author
Fatih Karataş
Institution
How to Cite
Fatih Karataş (Master Thesis). Design of FPGA-based ECG simulator with VHDL, 2021, Afyon Kocatepe University.
Keywords
License
Tüm Hakları Saklıdır
This work is shared under the specified license terms.
More theses from Afyon Kocatepe University
- A study on the applications of viola educators on effective participations of student learning process(2019)
- According to the temettuât notebooks Nevâhî-i Barçin town's social- economic position(2008)
- İmamkulu Han's period in the Bukhara Khanate (1611-1641)(2023)
- A phenomenological research on the social suicide phenomenon from Byung-Chul Han's performance subject(2025)
- An examination of the life and performance style of Mevlidhan Bilal Demiryürek(2025)
- The services of XVIIIth century Ottoman proconsuls as the Hajj Emirate(2017)
