Adaptive bias and class AB operational amplifier topologies for sigma delta converters

The technological improvements in digital Very Large Scale Integrated (VLSI) circuits increase the need of analog digital converter with high performance and lower power consumption. Principally, the oversampling techniques such as sigma delta modulation should be chosen instead of Nyquist rate analog digital converters to satisfy this need. Since sigma delta modulation combines oversampling, quantization noise shaping and digital ltering in order to achieve high performance. Also, the power consumption and the speed performance of the operational ampli ers which are utilized in in the modulators should be optimized for low voltage and high speed applications. In this thesis, rst of all, basic concepts of oversampling analog digital converters are explained then similar works which had been done before are examined. After that, a new low power operational ampli er designs in Mentor Graphics CAD tool are proposed. To reduce the power consumption of operational ampli ers in integrators as much as possible is the purpose of the research. Moreover, the proposed operational ampli ers are compared to each other in order to illustrate bene ts of di erent topologies. Also an inverter used instead of an operational ampli er. The better topologies are also simulated within second order feedforward sigma delta modulator to nd the architecture that consumes the minimum power.