Assertion based verification for analog and mixed-signal designs using simulations

This thesis studies assertion based verification methodology for analog and mixed-signal (AMS) designs and improves analog expressiveness of assertions. Assertion based verification methodology is originally derived for digital domain, hence AMS assertion languages are inadequate to express all aspects of AMS designs. Therefore, we first introduce the halo concept for analog signals to formally express them with their tolerance and variation values in assertions. Haloes of analog signals define an effective region around these signals which help analog comparison. Second, we integrate measurements and circuit analyses into AMS assertions. These analyses are widely used verification techniques in conventional AMS verification. Their integration into assertions provide a complete and unified AMS verification methodology. Finally, we develop AMS-Verify, a flexible framework to verify AMS properties on simulations. AMS-Verify is able to express analog tolerances, measurements and circuit analyses. We validate our solutions in three case studies using AMS-Verify framework.