Integrated cmos receiver system for high speed visible light communication

The speed of microprocessor has risen excessively during the last decade. The overall speed of the system is defined not only the speed of microprocessor but also the speed of the channels by which data is distributed inside the system. Using optical channel, a very high speed of data transmission and reception is aimed with the increased data rate. However Visible Light Communication System consists of main four components, which are Light Emitting Diode (LED) in the visible wavelength as transmitter, communication channel, photodiode as receiver and trans-impedance amplifier converting the current signal to voltage one, where the overall speed of the system is limited due to the low bandwidth of the LED. In order to increase the speed of the system, the restricted bandwidth generated from a LED has to be extended which allows us to obtain higher data speed. Equalization is one of the methods used for this purpose. The circuit of this method is called Equalizer. It can be used in order to increase the bandwidth of a LED. In this thesis, firstly Trans-impedance Amplifier and Discrete Receiver System are designed and simulated with Advanced Design System (ADS) and Altium Designer using discrete elements. Then, the simulation and measurement results of these circuits are given. Secondly, Integrated CMOS Receiver System is designed and simulated with Mentor Graphics using 130 nm CMOS technology and its pre and post-layout simulation results are given.