Integration of a maze shield into digital asic design flow for hardware attack resistant ICs

With the increasing use of Integrated Circuits (ICs) in various sectors such as automotive and banking, it has become inevitable to use them for storing critical data. As software security has strengthened, attackers have shifted to direct physical attacks on chips. One such attack involves using Microprobes and Focused Ion Beam (FIB) for structured intrusion. In this type of attack, the goal is to mill the outer layers of the chip with an ion beam and touch the internal data with a microprobe, gaining access to the signals inside the chip without the need for any software-based system. The objective of this thesis is to develop a flow that implements all the stages required to produce a chip resilient to attacks using Microprobes and Focused Ion Beams. The chip to be produced, containing critical information, will have a shield structure above the location of critical data and a control circuit below to detect any external attacks on the shield. The first step involves creating the shield to be placed on the chip. To prevent easy tracking of the generated shield, a complex maze algorithm called AFSA is employed. The generated maze is traversed by a function that converts the maze into a Hamiltonian cycle, transforming it into a shield structure. The produced shield is made examinable through a 3D visualization function. This function is used to check the complexity and accuracy of the generated maze. The generated shield is then transformed into the Library Exchange Format (LEF) file format, a language understood by digital design tools. The converted shield, along with the control circuit and the circuit to be protected, undergoes the digital chip design flow. At the end of the flow, a production-ready secure chip is created and sent for tape-out.