Modeling localized heating induced size effects in semiconductor devices

Micro and nano scale semiconductor devices could undergo localized self-heating that obscures phonon transport and leads to size effects and peak device temperatures. Consequently, device performance and lifetime are degraded. The profile of the localized heating is the main contributor to the size effects and a comprehensive numerical investigation is conducted for understanding profile effects. Also, besides numerical methods, accuracy of micro-Raman and thermoreflectance thermal imaging (TTI) experiments for capturing the peak device temperature is investigated. It was observed that although the aspect ratio of heat generation area alters the size effects, area was found as the main factor. Horizontal and vertical lengths of the profile have dissimilar impact on the peak temperature. Moreover, heat flux boundary simplification is tested with sub-continuum model that could alleviate computational costs. If the heat generation profile laterally spread, the phonon Boltzmann transport equation (BTE) model with boundary flux approximation can estimate the size effects with 0.5-8% errors. Also, this approximation yields ~0.6-3.1% error in AlGaN/GaN transistor electro-thermal model. Virtual experiments showed that neither the micro-Raman nor the visible TTI can determine the peak temperature in AlGaN/GaN transistor and device structure does not change the accuracy markedly. TTI yields smaller error, nevertheless, it can be up to ~21°C. Finally, these numerical calculations were proven by the actual visible TTI and the novel UV TTI experiments. The visible TTI experiment and continuum scale models underestimated the device peak temperature by ~20°C. Furthermore, the agreement between the UV TTI method and the phonon BTE calculations proved the size effects experimentally.