The effects of temperature to undervolting in terms of error rate and power and a temperature controlled undervolting method

Due to high performance, low power usage, design flexibility, simple and reconfigurable design ability, FPGAs are chosen as hardware accelerators for embedded, defense and space applications. In FPGA based design, scaling supply voltage is a very effective technique to improve energy efficiency. For the systems which use undervolting, it is also important to avoid errors for reliability while reducing power consumption. For this purpose, detecting the minimum voltage, Vmin, lowest voltage value which does not cause any errors, is critical. Through the previous research on undervolting, it has been shown that it is possible to operate on-chip BRAM memories of FPGAs safely up to 39% below the vendor specified nominal voltage. In this paper we show that the effect of junction temperature is crucial on the exact level of Vmin of the supply voltage of BRAMs. While the junction temperature of FPGA is increased, it is safe to decrease Vmin of the supply voltage of BRAM further to achieve more power efficiency. We analyzed the whole behavior of scaling supply voltage between -30℃ and +82℃ junction temperature. We also observed that minimum safe voltage for FPGA BRAMs varies in this temperature range and it is possible to save up to 9% more power. For a reliable and energy efficient undervolting operation, we propose a method that reads the junction temperature of FPGA and adjusts the supply voltage of FPGA BRAMs for a safe undervolting at this temperature. By the help of this method, we achieved up to 40% decrease in power consumption with only an additional 0.04% resource usage.