Design and implementation of a single flux quantum based memory controller for josephson-cmos hybrid memory

Single Flux Quantum (SFQ) digital circuits which are capable of high-speed operation with low-power consumption have been developed as an alternative to CMOS integrated circuits. Unfortunately, because of the low integration density and low driving capability of SFQ circuits, realizing large-scale memories by using only SFQ circuits is still a challenge. Josephson-CMOS hybrid memory hybridizing high-speed, low power SFQ circuits and high-density CMOS memories is already proposed as a solution to the large-scale memory problem in RSFQ digital systems. In this study, an SFQ based memory control unit which works up to 10 GHz clock frequencies is designed for Josephson-CMOS hybrid memory systems. The memory controller acts as a CMOS/SFQ interface between the SFQ circuit and SRAM module and generates the required waveforms for SRAM read and write operations. The circuit has 4-bit data and 2- bit address lines. However, the design is scalable to larger memories. The designed circuits have been fabricated with AIST-STP2 standard production process and operations of the circuits are verified.