Layout techniques for analog building blocks and application to an adaptive output buck converter

Integrated circuits (ICs) have become an essential part of our daily lives. Different kind of chips called Application Specific Standart Product (ASSP) is being used in specific part of a system. Chip creation contains analog, digital and layout designs. Each design step is important to succesfully fabricate desired chips. There is a need for power management circuitry in ICs, in order to power each and every device. Today's trend of mobile technology increases the need of power management. LDOs, DC-DC converter or buck converter and buck-boost converters must be utilized. Inside ICs, power management circuit design is an active research area and there are many publications in the literature about this topic. This thesis focuses on basic layout, layout strategies and layout of buck converter. This thesis is organized as follow. In chapter 1, the fabrication process of. MOSFET devices are explained. Then basic layout structures are described in detail, starting from CMOS layout structures to diode, BJT layout and layout of passive components. Isolation structures are explained in chapter 4. These isolations are both contain process related isolation and layout design isolations. Issues coming from layout are given in detail in chapter 5 which affects block performance significantly. Layout matching is explained and demonstrated in chapter 6. These layout structures and strategies are very important in layout design. In chapter 7, analog blocks of adaptive output buck converter is explained in detail. The layout designs are analysed in detail to show what kind of layout structure is used. Most important part of buck converter is the pass device which is explained in detail with layouts. Resistive extraction tool is used to extract metallization resistance for spotting the weak parts in pass device metal structure. Moreover, this tool gives the total on resistance of pass device which can be given feedback to analog designer to modify their buck converter simulations. Total laid out pass device area is 800µ x 650µ while total buck converter design occupies 800µ x 940µ. Buck converter is designed in a 0.25µ process with 1 poly 5 metal process.