Layout works of various capacitor multipliers to reduce the integrated circuit area

The main aim of this thesis is reducing the silicon area by using capacitor multipliers. This focus requires very good layout work, correct methodologies should be applied during layout work. Structure of semiconductor devices must be known in order to apply these methodologies. These main components are MOSFET, resistor and capacitors. Capacitors are classified in to three categories, these are; MIM, MOM and MOS capacitors. They are explained in chapter 2 in detail. Analog layout techniques are explained to produce the optimized layout. These techniques are used for matching and reducing silicon area. Current distribution may be considered as another approach. Mostly, MOSFETs are placed to an integrated circuit by using these techniques. Capacitors and resistors are also important because they occupy large areas in an integrated circuit. These techniques may change as technology changes year by year. The main reason for this is discovering new behaviors of semiconductor components as their dimensions scale down. Mainly, there are two types of capacitor multipliers. These are voltage mode and current mode multipliers. One voltage type and two current types are designed and their layout work are done. They are simulated for three multiplication factors. These are 28, 65 and 126. Magnitude and phase of impedance of equivalent capacitor is simulated. Capacitance behavior are determined in frequency domain thanks to the impedance analysis. Equivalent capacitor is calculated between frequencies which are described with impedance response. Quality factor of equivalent capacitor is also simulated between the same frequency range. Three topologies are compared in terms of equivalent capacitor, area gain and frequency range. As a conclusion, results of three topologies are consolidated and also advantages and disadvantages are shown for three multiplication factors. As a future work, fabrication of these topologies is advised. Also, new methods must be considered, especially for voltage mode.