A new approach for N-stage RC ladder networks based on Elmore delay model

Elmore delay model which is considered to be the most popular and unprecedented method of analog and digital integrated circuit delay calculations, is the main part of many design approaches ever since. Through delay calculations of VLSI circuits, distributed RC ladder networks are utilized as a modelling tool. Thus, delay calculation complexity of corresponding circuit is related with the stage number of RC ladder network. Thanks to Elmore delay model, complex calculations are easily done. In this thesis, a composed linear relation between SPICE simulation results, experimental test results and Elmore delay model is observed during researches for N-Stages RC ladder network. After characterizing the deviation problem between SPICE and Elmore delay, an improved Elmore delay model is proposed. The proposed delay model is extracted by applying Least Mean Square method on SPICE simulation results stated by experimental test results. The proposed method is tested on N-Stage RC ladders and test results are compared with that of SPICE simulation environment. All implementations of the proposed approach are done in MATLAB environment. Accordingly, the proposed method was shown to be significantly efficient.