Accelerating stencil computation in multi-core architecture

Stencil computations are common in linear systems of equations, numerical solutions of partial differential equations, molecular dynamics and many other scientific problems. For large structures, long computation times are an important problem. Increasingly higher number of cores are used in parallel for such computations, but still, the speedups are not sufficiently satisfactory. The main aim of this thesis is increasing the cache reuse and minimizing number of memory accesses by optimizing loop structures. We present and test several algorithms and improvements on them to get an optimal runtime.