Silisyum nanotellerin kalin silisyum katmaninda yekpare üretimi ve nanomekaniksel testi

Nanowires have gained prominence in the fields of nanoelectronics and nano electromechanical systems thanks to continuous miniaturization of components and their utilization in day-to-day applications. Unique properties are exhibited by nanoscale structures due to quantum size confinement and an extremely large surface-to-volume ratio compared to their bulk-counterparts. Hence, mechanical characterization of these novel nanostructures is crucial in order to fulfill reliability requirements of these devices. A significant work still lies ahead in the mechanical domain due to challenges encountered inconsistent nanowire fabrication, manipulation, alignment and attachment in a test setup. The primary aim of this study is to develop a top-down fabrication approach allowing monolithic fabrication of silicon nanowires in a thick silicon layer, either a silicon wafer or the device layer of an SOI substrate. This will ensure a good level of control on nanowire dimensions and orientation along with a permanent attachment to surrounding support structures. The second aim of this study is to characterize the mechanical integrity of resulting nanowires through a high-resolution testing approach. For these purposes a fabrication technology is developed based on high-resolution lithography, directional etching, sidewall passivation and controlled undercut through deep reactive ion etching. Resulting nanowires exhibit widths (in-plane dimensions) between 20-80 nm, where a thickness (out-of-plane dimension) of 100 nm is demonstrated over very deep (10 um) trenches etched in silicon. A wide range of aspect ratios with nanowire lengths ranging from 200 nm to 12 um is achieved. Following the successful demonstration of the fabrication approach, three-point bending experiments are conducted on silicon nanowires using atomic force microscopy. Tests are conducted under ambient conditions by using a PeakForce Quantitative Nanomechanical Property Mapping module. Both elastic and fracture behavior of nanowires are captured. Results interpreted through analytical and numerical tools indicate the existence of a tensile intrinsic stress within nanowires. This work provides a significant contribution to the monolithic fabrication of silicon nanowires where crystalline orientation, location and dimensions are solely determined by the layout design. Although an etch depth of 10 um is demonstrated, guidelines are as well provided to increase the depth to 50 um and beyond. The developed technology is unique and has important implications for future integration of nanowires with microsystems.