Master'sOpen Access

2-dimensional EG-LDPC codes for achieving fault tolerance in SRAM based devices

Is this your thesis?

This record came from a bulk archive import. If it’s yours, link it to your profile.

2013
0 views
0 downloads

Abstract (EN)

In this thesis, two dimensional EG-LDPC codes based methods are explored to migitate effects of radiation induced soft errors on SRAM memory chips and SRAM based FPGAs in space environment. First, impacts of errors, error mechanisms and features of errors are shown. Then, solutions are proposed by employing 2-dimensional (2-D) error correction codes (ECC) composed of EG-LDPC codes for data to be stored at SRAM memory chips or at configuration memory of SRAM based FPGAs. Using 2-D ECC scheme proposed in this thesis it is shown that effects of soft errors at SRAM memories can be mitigated and error detection and correction capabilities are enhanced compared to 2-dimensional schemes suggested at previous works.

Author

Mustafa Demirci

How to Cite

Mustafa Demirci (Master Thesis). 2-dimensional EG-LDPC codes for achieving fault tolerance in SRAM based devices, 2013, TOBB Economics and Technology University.

License

Tüm Hakları Saklıdır

This work is shared under the specified license terms.

More theses from TOBB Economics and Technology University