Uygulamaya özgü türdeş olmayan mikrodevre ağ tasarımı

With increasing communication demands of processors and memory coresin Systems-on-Chips (SoCs), application-specific and scalable Network-on-Chips(NoCs) are emerged to interconnect processing cores and subsystems in MultiprocessorSystem-on-Chips (MPSoCs). The challenge of application-specific NoCdesign is to find the right balance among different trade-offs such as communicationlatency, power consumption, and chip area.This thesis introduces a novel heterogeneous NoC design approach where biologicallyinspired evolutionary algorithm and 2-dimensional rectangle packingalgorithm are used to place the processing elements with various properties intoa constrained NoC area according to the tasks generated by Task Graph forFree (TGFF). TGFF is one of the pseudo-random task graph generators usedfor scheduling and allocation. Based on a given task graph, we minimize themaximum execution time in a Heterogeneous Chip-Multiprocessor. We specifically emphasize on the communication cost as it is a big overhead in a multi-corearchitecture. Experimental results show that our approach improves total communicationlatency up to 27% with modest power consumption.