Implementation of sigma-delta modulator via FPGA

Data carrying signals of the physical systems or the events is mainly in the continuous-time form. So, these signals are defined in every point of the time and have infinite length any value. The continuous- time methods are used to analysis of these systems. But, analyzed of the some systems are very difficult with the continuous - time methods, take more time or impossible. Nowadays, solutions can be produced to these problems with developing digital methods and electronic circuit technology. Time saving is provided by designed high-speed systems and advanced digital methods are applied to the difficult or impossible of the problems. Signals are discrete-time in digital domain. Continuous-time signals are transformed into discrete-time and then digital methods are applied. During this process the most important step is to convert continuous-time digital signal value as accurately as possible. These circuits for this purpose are called analog to digital converter (ADC). Recently, different structures of ADC have been developed. ADC?s are separated from each other with speed and resolution properties. The appropriate structure is chosen depending on the application.Nowadays, The Sigma-Delta ADC is the most popular structure of the ADC. The Sigma-Delta Modulator (SDM) is widely used in various signal processing applications. ADC is especially used in signal processing with low band-width which is required the conversion of the high resolution and accuracy. Due to structure of the feedback, the tolerances of components, which use in SDM can be high. Although SDM is commonly used, structure of its behaviors is not fully defined. Thus, studies on the SDM have been gradually increased.Continuous-time (analog) circuit elements or digital chips are used in implementation of the SDM. Digital chips are gained the fast, capable and flexible structures with emerging technology. FPGA have these features in a chip structure.In this thesis, First-order SDM is implemented on the FPGA. Firstly, first-order SDM has been simulated using various input signals in MATLAB/Simulink Environment. First-order Discrete-time SDM has been implemented on FPGA using the ?Xilinx System Generator for DSP?. In implementation, Xilinx Virtex5 (XC5SX50T) FPGA has been used.Keywords: Sigma-Delta Modulator, FPGA, VHDL, System Generator.