Hardware realization of a general purpose memory interface based on FPGA
Is this your thesis?
This record came from a bulk archive import. If it’s yours, link it to your profile.
Abstract (EN)
Today, in many digital systems, it is necessary to store data for short or long duration. Memory elements are often needed to storing and retrieving data in areas such as artificial, cellular or convolutional neural network designs, big data management, image processing applications that require high performance and parallel computation operations. If it is necessary to perform these storage and recall operations in real time, it is very important that the bandwidth of the write and read operations on the memory is sufficient. At this point, the operating frequency of the memory element is required to be high enough, as well as the memory interface that bridges the gap between memory and the system is required to operate at high speed so that it can perform both memory and system operations. The general purpose memory interface presented in this study has many advantages in many areas that require high speed and bandwidth, especially in real time applications. Previously, it has been reported in the literature that real-time cellular neural network applications require a memory interface to perform time-derivation operations. The general purpose memory interface presented in this work is planned to be used in time-derivative CNN realizations to fulfill the need of memory interface. Using the designed interface, the video standards that are common in real-time image processing applications, which are among the possible uses of the interface, have reached the bandwidth that allows processing at 60 fps at Full-HD 1080p resolution and at the very least. Different types of memory have been used during the testing of the interface. Using these 16-bit DDR SDRAM memories, a maximum bandwidth of 1.98 Gbit/s at 133 MHz clock frequency and a maximum bandwidth of 39.76 Gbit/s at 667 MHz clock frequency using 64-bit DDR3 SDRAM memory were achieved. If a real-time video stream with Full-HD 1080p resolution is considered, storage capacity of up to 15 frames on 256 Mbit memory and a total of 60 frames on 1 Gbit memory have been achieved.
Author
Doğancan Davutoğlu
Institution
How to Cite
Doğancan Davutoğlu (Master Thesis). Hardware realization of a general purpose memory interface based on FPGA, 2018, Yıldız Technical University.
Keywords
License
Tüm Hakları Saklıdır
This work is shared under the specified license terms.
More theses from Yıldız Technical University
- A ruled-based software model in the preliminary design phase of housing: Example of Mardin(2008)
- 19th-20th centuries apartment buildings in Şişli and Osmanbey(2001)
- An investigation on the relationship between problem solving and critical thinking skill, and academic achievement of vocational and technical high school students(2017)
- Numerical investigation of single bubble flow boiling both on a flat surface and on a cavity in horizontal pipe and pool boiling on a flat surface(2018)
- Examination of the categories in which buildings with LEED v3 and v4 certificates score the lowest points in Turkey(2018)
- Examining ?Historical housing structures" within the confines of protecting ecological balance(2012)
