Frequency and time syncronization in LEO satellite communication receivers

The main challenge in the design of communication receivers on the LEO satellite is that the carrier signal has a fast and wide range of Doppler frequency shifts. Therefore, the basic component of the demodulation process at the receiver is the synchronization steps. Nowadays, software-defined radio (SDR) receiver designs are frequently used for certain advantages. In this thesis, an SDR-based receiver architecture is designed and the signal sampled by ADC after super-heterodyne RF front end block in this SDR structure is processed numerically in the FPGA. In this thesis, adaptation to Doppler frequency shift in LEO satellites is provided by digital signal processing. It is observed that this adaptation is achieved by performing frequency synchronization in two steps. Coarse frequency estimation is first used for wide-range change of Doppler frequency; afterwards, rapidly changing frequency shift is followed by fine frequency tracking based on Costas loop. In order to reduce the cost of calculation for coarse frequency estimation, a design has been made with FFT and Kay estimator and this frequency estimation form is one of the important findings of this thesis. Accurate frequency tracking is performed with the Costas loop having FLL and PLL loop filters. Moreover, in order to achieve the desired performance with this thesis study, it is shown that timing synchronization should be performed simultaneously with the coarse frequency estimation and fine frequency tracking blocks. To sum up, an SDR-based receiver architecture that effectively solves synchronization problems for the LEO satellite communication receiver has been developed and a new synchronization and demodulation algorithm is presented considering the cost of calculation for the FPGA in which the software receiver algorithm is implemented.