Numerical analysis of conduction in multi-layered electronic equipment

In this study, the conduction in the chip, which is the main part of an electronic system, was investigated in both two and three dimensional model and the maximum temperatures were calculated between 2 W and 15 W power due to system activeness. Temperatures are calculated for both steady-state and unsteady conditions using computational fluid dynamics program Fluent and Ansys program is used for deformation, stress and strain analyses. Sample chip is considered to be composed of two layers; one is 2 ?m gold, and the other is 0,4 mm silicon The chip has 1,5 mm x 1,5 mm dimensions. Two different cases are taken into account for the problem. The first one is the sides are considered to be adiabatic, and bottom face is held at 300 K and the second one is natural convection is considered on the sides and the bottom face is held at 300 K. For both two cases heat distribution is stated as contour graphics. Results were examined if they had an affect on the reliability. The affects of changes in the thicknesses of each layer, and copper usage instead of gold, in the maximum temperatures and also in the distribution is investigated. It is seen that maximum temperature increases due to thicker silicon layer. And for the copper usage instead of gold the maximum ii temperature is calculated, just a little bit higher. Compared to the producer test data it was seen that results were compatible. Key Words : Conduction in Chips, Cooling of Electronic Equipment