I2C-bus monitoring system design implementation
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Abstract (EN)
TC BUS MONITORING SYSTEM DESIGN IMPLEMENTATION SUMMARY Keywords: I2C bus, I2C bus controller, serial buses, bus monitoring, In this thesis, hardware based, stand-alone 100Kbit/s speed I2C bus monitor is carried out. I2C traffic is logged to the local on-board memory. With the help of hard and software filter the stored messages can be limited to the interesting ones. The I2C-bus is a protocol which supports the communication of the various chips in embedded systems or portable devices. All bus activity including start/stop events, slave addresses, read/write requests, acknowledgments, and data are displayed on computer. This thesis explains software and hardware specification for monitoring an I2C-bus with the standard of 80c51 microcontroller. The PCF8584 is a controller which can listen to I2C-bus. This chip can be used to listen and monitor the actual data on the I2C-bus. It provides what is going on the I2C-bus. It has several internal register to tell it what to do and how to act upon the I2C-bus line. The 80c51 sends control and data bytes to control the PCF8584 in monitor mode. I2C-bus monitör system can be used for testing available signals on the I2C-bus and error conditions. Because of this, it can be used as a test equipment in a digital laboratory. I2C-bus actions are logged to the on-board memory and the system designed filters the stored messages. IX
Author
Sedat Atmaca
Institution
How to Cite
Sedat Atmaca (Master Thesis). I2C-bus monitoring system design implementation, 2002, Sakarya University.
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