Implementation and comparison of advanced encryption standard (AES) modes on FPGA

System-On-Chip (SoC) is an interesting target platform that includes both hardware and software on a single chip which makes an embedded system a typical development environment. The main idea for this thesis is to study and implement state-of-the-art cryptographic block cipher Advanced Encryption Standard (AES) modes of operation on a SoC development environment.In this thesis implementation and comparison of AES block cipher algorithm modes of operation on a Xilinx SoC development platform have been accomplished. It consists of two parts, hardware and software and both sections have been developed by using Xilinx licensed Embedded Development Kit (EDK). At the hardware section the hardware input output interfaces are determined according to the requirements of the project and the corresponding hardware is designed. At the second section, the software requirements are determined similar to hardware, AES and modes of operation is developed by using ?C? as the programming language and the software is tested by commands entered through serial port. A detailed analysis of AES and modes of operation, MicroBlaze soft processor core architecture is investigated. Implementation is realized on a soft processor core, MicroBlaze and analyzed using mb-gprof profiler (a gprof based profiler). A software intellectual property (IP) that is capable of demonstrating all modes of operation including electronic code book (ECB), cipher block chaining (CBC), cipher feedback (CFB), output feedback (OFB) and counter (CTR) modes is generated and tested with build-in test application commands and each mode is compared in terms of time taken to encrypt-decrypt messages.