New possibilities in the design of CMOS frequency agile filters

Telecommunication is widespread in all areas of society. Although digital signal processing emerges on analog counterpart, analog signal processing is an indispensable part of telecommunication. For example, analog filtering is one of the most important unavoidable function of transceiver architectures. Nowadays, the new telecommunication techniques have increased the importance of multi-standard transceivers to realize more flexible transmitters and receiver blocks. Multi standard transceivers increase the universality of the designed transceiver circuit for all applications to implement on a single chip. For example, for more convenience 4G cellular system transceivers must be suitable for more than one standard for best connectivity. GSM, GPS, WCDMA, Wi-Fi (IEEE 802.11a/b/g/n), WiMAX, Bluetooth, Zee Bee and Ultra Wideband (UWB), are certain prospective standards that can be considered as pieces in the circuit of the final wireless network. Some analog parts, especially band selection filter and oscillator of the multi-standard transceivers must be reconfigurable. The reconfigurable filter called as frequency agile filter is one of the background circuit multi-standard transceivers. The frequency agile filter allows to sense different protocols with only one circuit. Such a circuit can be a signal processing part of different positioning systems bands (GPS, Beidou, GNSS and Galileo) to process different positioning system protocols in the same circuit. Also, one of the most critical part of the Zero-IF receivers ABB is reconfigurable low pass filter. Furthermore, frequency agile filter can be considered as a part of frequency hopping system used in military applications for secure communication. Frequency hopping spread spectrum known as (FHSS) and direct-sequence spread spectrum (DSSS) are two types of encoding system. In FHSS transmission technology, the data signal is modulated with a narrowband carrier signal hopping arbitrarily frequency to frequency. The random modulation can be predictable by only the desired receivers. Instead of chopping each bit into small part, the signal energy is spread in time domain. The signal coming from narrowband system can only affect the spread spectrum signal in the case of the both signal transmitting at the same frequency at the same time. As a result of this technique, the interferences are reduced. The random hopping codes determine the transmission frequencies. The same random hopping code trigger the receiver to read the desired information. 75 or more frequencies per transmission channel with a maximum dwell time of 400ms are used by current FCC regulations. 400ms is the time spent at a particular frequency during any single hop. As a result, the frequency agile filters have great importance in the structure of multi-standard transceiver and the secure communications. The research about current-mode approach has been investigated in detail in the literature. Current mode circuits have some superior advantages compared to the voltage-mode circuits. Wide bandwidth, wide dynamic range and simple circuitry with lover voltage supplies are some advantages of current mode circuits. In this work, some circuits designed with current mode to profit its advantages and some circuits designed with voltage mode to take advantage of its advantages. The thesis is essentially composed of four different methods to design frequency agile filter. In the first method, frequency agile filter is designed with feedback technique. This method can be applicable to the conventional second order filters which has at least two outputs; low pass and band pass. The low pass output is fed back to the input by passing through a gain stage. This gain stage can be ECCII (Electronically Controllable Second Generation Current Conveyor), CCII (Second Generation Current Conveyor), CDTA (Current Differencing Trans conductance Amplifier) or etc., In this chapter, a new implementation of frequency agile filter based on CDTA and ECCII is presented. AMS 0.18µm technology is used to design the proposed circuits in this section. The designed circuits in this part is proposed for GPS protocols and Single Channel Ground and Airborne Radio System (SINCGARS). In the second method; frequency agile filter is designed with MOS-Only technique. The frequency agile filter designed with MOS-Only circuit is firstly proposed in the concept of this thesis. The core of this design is constructed over the previous method. Because of that, the recommended MOS-Only circuit also must have at least low pass and band pass outputs. The most critical property of the MOS-Only circuit is that the low pass output must flow directly or indirectly to the input. TSMC 0.18µm technology is used to design the proposed circuits in this section. In the third method, two different VDTA (Voltage Differencing Transconductance Amplifier) based frequency agile filter circuits are recommended. This method can be classified as gm-C filter. The agility is realized by changing the transconductance or the capacitance of the filter. Second example of this method is realized with MOS-capacitance. The operations of the designed circuits at high frequencies are proved with post-layout simulations. The designed circuits in this part are proposed for HAVE QUICK. AMS 0.18µm technology is used to design the proposed circuits in this section. In the last method, a new method to design variable transconductance amplifier (VTA) is proposed. This new cell-based VTA is inspired from cell based variable gain amplifier. Furthermore, the CMOS implementation of the Operational Transconductance Amplifier is realized with this new VTA circuit. Two new reconfigurable Analog Baseband low pass filters for Zero-IF receivers are proposed by the aid of this new cell-based VTA structure. One of them operates voltage mode, the other operates current mode. The designed frequency agile filters can operate in large spectrum. Also, the operating frequency of the filter can support very low frequency (e.g. 20kHz) and high frequency (e.g. 50MHz) with low power dissipation. The design of these circuits are realized with TSMC 0.18µm technology. All circuit layout and post-layout simulations are realized in CADENCE environment. It is desirable that the designed circuits give new opportunities to the electronic designers.