Variable gain amplifier design for automatic gain control systems

In this study, the structures of automatic gain control systems (AGC) were examined and mathematical analyzes were given. There are two main structures for AGC blocks. Feedback AGC's are advantegous, which allows low linearity peak detector design thanks to inherent linearity of a feedback system. Feedback AGC's can also be designed without logarithmic amplifiers. However, stability criteria prevents fast settling times. Feedforward AGC's allow very fast settling times but peak detectors must be designed with high linearity. In addition to this, Feedforward AGC's can not be designed without logarithmic amplifiers, which is hard to implement with CMOS. What kind of control function should the variable gain amplifier (VGA) have in the system (AGC) and the effect of this block on the system are investigated. The explanation of why the VGA blocks should be designed with exponential voltage control, is presented. The analyzes show that an exponential gain control block for VGA is necessary to prevent varying settling time which varies with signal amplitude. MATLAB simulations are given to demonstrate the effect of gain control function on AGC settling time. The main CMOS VGA design methods in the literature are briefly explained. Designing a VGA with exponential voltage control for BJT technology is simple because of the BJT current-voltage relationship. However, the CMOS structure, dominated by digital circuits, encourages analogue blocks to be implemented with this technology in terms of cost and integration. CMOS subthreshold operating region allows exponential relationship; but due to high noise problems, this working area is not often a preferred region for CMOS VGA design. For this reason, exponential voltage or current control that can be realized in CMOS technology are sought. Psudo exponential VGA and Taylor Series expansion are two main methods for implementing VGA with CMOS saturation region. There are another methods such as; triode region MOS control and degeneration resistor control, which allow an exponential gain relationship. A Taylor series approach is proposed for exponential voltage control in order to achieve the required dB lineartiy for gain control, and it is demonstrated how this approach can be implemented using linear OTA and squarer blocks. For the approach, an absolute value transconductance amplifier and a 2 quadrant even-odd function converter is proposed. The methods in the literature are designed in a suitable way to obtain 2, 4, ... 2n terms for expansion. The proposed structure in this study, allows the implementation for all odd or even order. By adding a squarer block, expansion degree can be increased by one. Thus, dB linearity required by the application can be implemented with this method in CMOS technology. The proposed structure is also a solution to realize any function that can be represented by Taylor Series. By multiplying the obtained terms by appropriate coefficients, the voltage controlled current source can be realized for the desired functional relationship. For exponential current generation, second order Taylor Series expansion provides approximately 15 dB linear range with 1 dB gain error. For a 8 dB increase in the linear range, the degree of expansion must also be increased by one. In this thesis, 6th order Taylor expansion is implemented to provide at least 40dB linear range. The fact that the bandwidth of CMOS VGA circuits varies along the control voltage is a fundamental question. Because variation in bandwidth will be too much for a large gain range. This problem makes also it difficult to optimize speed of the AGC system. Another disadvantage is that the transconductance of a transistor is square-root related to the current. Since obtained control function is converted to gain with tranconductance, the dB linear range of VGA is reduced by half. The proposed circuit, based on the Gilbert Cell, allows the load transistors or load resistors to operate at the same current through the gain range. In addition, input transistors provide an exponential relationship in the opposite direction, thereby providing gain with the difference of these transconductances, preserving the linear range for a single VGA block. Since the VGA design operates in open loop mode, DCOC (DC Offset Cancellation) circuit is added to the system. This circuitry reduces the offset voltages at the output. In addition to DCOC circuit, a CMFB (Common Mode Feedback) circuit is necessary if a fully differential topology is used with active loads. CMFB circuit senses common mode outputs and stabilizes it with an error amplifier. The proposed VGA has both DCOC and CMFB circuits. A ZTC (Zero Temperature Coefficient ) current source with combination of PTAT (Proportional to Absolute Temperature) and CTAT(Complementary to Absolute Temperature) is designed to bias VGA and other sub-blocks. Main advantages of proposed design is gain independent bandwith. Moreover gain range does not decrease by half thanks to circuit topology. IIP3 is optimized for lowest gain mode and NF is optimized for highest gain mode at 27°C. The proposed circuits are designed and simulated with Analog Virtuoso 6.1.5, using TMSC 180nm technology library and 1.8V single power supply. NMOS2V and PMOS 2V transistors are used, which means that power supply can not exceed 2V to prevent oxide breakdown. Bandwidth is greater than 350 MHz with approximately 10MHz gain variation. DCOC circuit causes a highpass corner frequency at approximately 8MHz; VGA has a low pass frequency approximately at 400 MHz. Thus VGA behaves as a bandpass filter. IIP3 simulations are done at 100 MHz center frequency and it's value is equal to 10.2 dBm for lowest gain mode. NF is smaller than 15 dB between 10 MHz and 500 MHz at highest gain mode. CMFB circuit ensure that the circuit has 500 mV DC common mode voltage. Monte Carlo simulations show that without DCOC circuit, VGA's differential output voltage increases up to 500 mV. When DCOC circuit is added to circuit, differential output voltage decreases by approximately 35 dB. VGA has a gain range between -15 dB and 35 dB, which is expected by 6th degree Taylor Series expansion. For gain error analysis MATLAB Curve Fitting Tool is used. Analyzes show that VGA has a 1dB gain error between -6 dB and 34 dB. Power consumption is approximately 23 mW at the highest gain mode. As a summary, in the first chapter, a short introduction is given, which includes usage areas for AGC. In second chapter detailed AGC analyzes are given to obtain motivation for designing exponential controlled VGA. In third chapter, a short literature review is given. In chapter four, proposed circuits and ideas are given with detailed mathematical desciption. A new VGA circuit based on the Gilbert Cell are introduced. Beside that, a Taylor Series expansion system is given with required sub blocks. In chapter five, detailed simulations are given with a comparison table at the end of the chapter, which demonstrates the systems's performance. Finally, in chapter six conclusions and future works are given.