SAR ADC'lerde kuantalama işleminde bozucu etkilerin analizi ve 50Vpp girişli 14bit 250kS/s SAR ADC ölçümü

Analog to digital converters are instruments that convert a physical quantity, a voltage or a current are the most common quantities in an electrical conversion scenario, to a digital value that represents the amplitude of the physical quantity with respect to a reference. Due to certain error factors, the digital value obtained after the conversion is not the perfect representation of the physical quantity. The design of an analog to digital converter integrated circuits requires the identification of these error factors and their optimization and minimization, and at the same time requiring the optimization of several other performance parameters such as power consumption, chip area and the number of external discrete components required. Reliable methods for characterizing and assessing the performance of analog to digital converters are required to verify and validate the design work. This study focuses on the successive approximation register type of analog to digital converter, in an analysis, design and measurement scenario. The operation principle of the successive approximation register analog to digital converter is analyzed and the primary error factors, stemming from the quantization operation, that deteriorate the performance from an ideal analog to digital converter are identified. The analysis is carried over to the design of a novel 50Vpp input range, with 14bit resolution 250kS/s SAR ADC. The SAR ADC and its operation is presented, with the previously identified error sources are correlated to the operation of the various circuit elements that make up the circuit. Finally, the measurement setup for the SAR ADC is presented. With the measurement setup, the SAR ADC is characterized and its performance parameters are extracted.