Yüksek performanslı ve düşük alanlı güvenlik uygulamaları için birleşik aes + aegıs mimarileri

Cryptography is going into everything, from bank cards to cell phones, cars, communication devices, cloud services, etc. There are many cryptographic algorithms to protect information from unauthorized accesses. The Advanced Encryption Standard (AES) is the most important block cipher today, since it is ratified as a standard by National Institute of Standards and Technology of the United States. It's proven security and reasonable resource usage makes it a right choice for almost all new applications. Several versions of AES have been implemented in both hardware and software with design targets varying from high-performance to lightweight. Since today's information security applications require both confidentiality and authentication, authenticated encryption (AE) has gained more importance. AES is considered by many cryptographers as the most appropriate choice for AE implementations. More recently, special AE schemes that utilize AES in its native form (or with minimal modifications) have emerged. While these modes claim better performance and resource usage, very few implementations exist to support these claims, yet. In this thesis, AES is combined with one of the most recent AE ciphers, namely AEGIS, in an effort to analyze the combined performance and resource usage of the two ciphers. This thesis proposes and implements in hardware two different architectures(i.e., high-performance and lightweight) for AES and AEGIS combined as well as AES alone, hence four architectures in total. This work is the first work to our knowledge to report a hardware implementation of AEGIS as well as it's combined implementation with AES, which reuses most hardware resources between AES and AEGIS. Implementation results obtained by using UMC 90nm low-leakage standard cell library and Cadence RTL Compiler are also reported and evaluated.