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Archived Theses
Investigation of the effects of holding times at cryogenic temperatures on residual stress distribution of aisi d2 tool steel
AISI D2 is cold tool work steel and is used widely due to the advantages such as its wear resistance, compressive strength and toughness. When the literature is reviewed, it is observed that researches associated with the effect of cryogenic treatment on residual stress are rather poor. Residual stress is very important since this affects some properties such as fatique life, wear resistance, crack propagation and stress corrosion which determine the service life of materials. In this study, effect of the holding time at cryogenic temperatures on residual stress of AISI D2 cold work tool steel is investigated. Results shows that tensile residual stress on surface of AISI D2 steel decreases with cryogenic treatment and subsequently turns into compressive residual stress on subsurface. While residual stress value on surface of the specimen for holding time (t_CT) of 24 h is 242,3 MPa in axial direction and 172.5 MPa in tangential direction, and in specimen conventionally treated is 321,5 MPa in axial direction and 316,8 MPa in tangential direction. There is no significant difference between hardness values, but carbide precipitation increases in specimen cryotreated for t_CT=24 h. Apart from this, surface roughness improves for cryogenic treatment. In comparison to conventional heat treatment and cryogenic treatment at various holding times, t_CT=24 h has better results regarding residual stress, carbide precipitation, and surface roughness.
The modeling and simulation of intersatellite laser communication systems
Free Space Optical (FSO) Communication Systems are alternatives to Radio Frequency (RF) communication systems due to the high data rate, high bandwidth capacity, smaller size, and weight, less power consumption, high security, resistance to interference etc. There are many manufactured satellites orbiting around the earth and RF technique, which is a conventional communication method for satellite systems, is used in order for them to communicate with each other. It is possible to send several Gbps data to thousands kilometers distances with laser communication. This is done by means of adopting optical wireless communication technology into space technology; hence, intersatellite optical wireless communication is developed. In this thesis, detailed literature survey about free space optical communication system has been done. The importance of laser systems for free-space communication has been discussed and the status of laser techniques for intersatellite communication has been examined. The functions of the each basic component such as laser source, photodetector, modulation type, telescope used in a typical system have been examined. The intersatellite link has been modeled and simulated by means of Optiwave Software for the various link configurations and the system performance (BER/Q-Factor) has also been analyzed in terms of each basic parameter such as transmitted power, wavelength, data rate, range and telescope diameter in order to achieve minimum BER. APD type and PIN type photodetector comparison has been performed. Moreover, Erbium Doped Fiber Amplifier (EDFA) has been used for the intersatellite link to recognize its effect on the link quality. It has been shown that communication performance of the system can be improved by choosing the most appropriate component in terms of communication requirements. Key Words: Intersatellite Laser Communication, Free Space Optical Communication, Optical Wireless Channel, Bit Error Rate, Q Factor.
Document tracking and inspector assignment system
SUMMARY In this thesis work, we have designed and implemented an "inspector duty assignment and work flow" program in order to perform assignment of inspectors to inspection duties and management of these assignment documents system. The system has the multiple functions such as registration of documents within a standard that come to be given to inspectors as duty, their processing, their being filtered when necessary, showing the filtered documents on a map, compilation of statistical data and assignment of these documents. The program has been designed and implemented step by step. Primarily, requirements of the program planned to be prepared have been determined, then design has been made according to the needs and coding has been carried out. In developing this system, software tools such as Ext Gwt, Gxt, Java2EE, database programming and management tools such as MySQL, Hibernate, EJB and web server tools such as JBoss and Apache have been used. All of these tools are compatible with Java infrastructure and are open-sourced software development technologies. The program has 3 parts as database, server and client. There are web pages prepared with Java2EE in the client side, data tables prepared with MySQL in the database side and JBoss application server in the server side. In general, for this thesis work, we have formed a web site that aims to present a user friendly interface, to provide a secure access to assignment documents with user login screen and to compile necessary statistical data. Keywords: Inspector Duty Assignment, Document Tracking, Java2EE, Ext Gwt Framework, Google Map API
PLC and scada system application in a construction chemicals manufacturing plant
Industrial automation systems have been securing their position in the sector day by day. PLC-SCADA systems are frequently used in various fields of industry as they have many advantages like cost reducing solutions, standard product output, minimized error rate, availability of receiving real-time statistical and instantaneous data, operation efficiency and automatic control. In this study a medium sized construction chemical plant is monitored with SCADA system and its automatic/manual control is provide by PLC command system through SDACA. SCADA program used is Reliance Design 4 and PLC program is ABB Control Builder Plus. Computer communication is through Ethernet. The number of total tag used in the system is 68. This study can be divided into 3 sections. In the first section general information on PLC, its definition, history, structure and programming languages is provided. In the second section SCADA definition, its advantages and areas of usage and structure were our focus in general. In the third and final section general information on construction chemical plants, detailed information on the software and hardware used in the study and how the system works can be found step by step. As a result with the automation system obtained, the amount of product produced in an hour and a daily slice of the facility, the amount of electricity consumed and number of workers in the facility has has been compared with the predicted values for the system having no automation. Key Words: PLC, SCADA, Automation, Construction Chemicals Plant
Performance improvement methods for layered decoding of ldpc codes
Low-density parity-check (LDPC) codes are a special type of linear block codes. Although they were originally invented by R. Gallager in 1960, they have captured the attention of scientific community since its rediscovery in 1996. Due to their excellent correction capability, they have been adopted in many communications and storage systems for forward error correction. Gallager defined an iterative two-phase decoding algorithm referred to as "Belief Propagation" (BP). Much study has been conducted to improve the performance of LDPC decoding. Later, another scheduling, "Turbo Decoding Message Passing" (TDMP) is introduced as an alternative to his standard message passing algorithm. TDMP, also called layered decoding, has the advantage of converging faster than the standard BP because it uses more reliable information to update next set of values. Using layered decoding, it is possible to reduce the number of iterations by 50% without any performance degradation. In this thesis, we present several methods in order to improve layered decoding performance of LDPC codes. Methods proposed have been applied to several LDPC codes with different length and rate. According to our results, the biggest performance improvements are achieved when they are applied to small-length, high-rate codes. In addition to proposed methods, a simulation acceleration platform using OpenMP is also described where parallel decoding is implemented on a real multicore hardware platform, obtaining more than 6x speedup compared to single-core version. Keywords: Low-density parity-check, error correction codes, belief propagation, layered decoding, performance improvement, DSP, parallelization, OpenMP
ECG signal processing techniques by using asp.net application based on gui in Matlab
An electrocardiogram (ECG/EKG) is an electrical recording of the heart and is used as an essential diagnostic tool in the investigation of heart disease, so any defect of heart rate or rhythm, or change in the shape of the QRS complex, is very significant to get an evidence for detecting cardiac arrhythmia. The most of earlier methods of ECG signal analysis for detecting PQRST was based on Digital Signal Processing (DSP) technique, for example Wavelet Transform(WF), Fast Fourier Transform(FFT) and Artificial Neural Networks(ANN). The work in this thesis have proposed a simple and dependable method to detect the P, Q, R, S and T values of an ECG signal normal and abnormal cases. This method is based on determination a mathematical relationship between the highest values (peaks and valleys) of the ECG waveform and time. Second part in the thesis includes using three different digital signals processing techniques for ECG signals are: Digital Filters (FIR and IIR), Wavelet signal processing (Filters Banks technique) and adaptive Filter Signal Processing. The work in this thesis is exemplified through designing a graphical user Interface (GUI) in MATLAB for creating a new software package for revealing of PQRST for both normal and abnormal ECG using a simple mathematical algorithm to get PQRST values, draw these values at the same time and share the package results to website using the ASP .NET application. The proposed software system will be devoted to the purposes of scientific research in the medical and engineering fields together, rather than clinical diagnosis as well as it can be utilized in training for clinicians and engineers working together in the same field which related to heart disease.
The effects of DC bias lines on terahertz photomixer antennas
Photomixer antenna is an essential part of photomixer design. The development on photomixer antennas has still being received considerable attention. DC bias lines are being used in photomixer design to provide required DC voltage to photomixer antenna in order to collect the electron-hole pairs that is excited by a laser beam focused on semiconductor substrate. This research investigates the effects of the DC bias lines on several types of antennas for terahertz photomixers and proposes a method, namely resistively loaded lines (RLL), to compensate the effects of the DC bias lines. The RLL is formed by placing lumped resistances periodically on the DC bias line in order to cease the leakage current virtually, which cause a significant amount of distortion on the antenna performance. In order to achieve a proper simulations of bias line effects on photomixer antennas, a parametric investigation is carried on electromagnetic simulator HFSS to obtain an optimized simulation technique. The simulation results of the dipole, folded dipole, log-periodic, and spiral antennas show that RLL almost removes the effects of the bias lines and improves the radiation pattern notably compared to that of the commonly used bias line types, such as coplanar stripline and photonic bandgap type bias lines.
Computer simulation and experimental implementation of single phase power inverters regarding output waveforms
Recent rises in electrical energy costs have done alternative energy options more attractive. A device such as solar panel is able to convert photons from the sun into the DC (Direct Current) electric which can be used by the end users. However, there is a problem by using this kind of energy. Our electric grid and most of the house appliances are based on the AC (Alternating Current) electric so the energy achieved by the sun or wind power needs to be converted from DC to AC to be useful. This converting process is done by an electronic device called inverter. Inverters can be found in a wide area of power electronics in the industry. The produced output voltage and frequency at the AC side of an inverter depend on the circuit structure, transformers and applied components. In this thesis, comparative analysis of single phase power inverters regarding their output waveforms was performed. Square wave, modified square wave and true sine wave inverter circuits were designed and analyzed using Proteus Professional package program. This comparison was fulfilled with respect to the circuit configuration, THD (Total Harmonic Distortion) and output efficiency. After simulation results these inverter circuits were realized on PCB (Printed Circuit Board) circuits. Efficiency of the inverters was calculated using Extech true RMS digital multimeter and THD values were measured by means of the Fluke 435 Power Analyzer device. According to the simulation and experimental results, the analyzed square wave inverter circuit has about 55% THD and 45% efficiency due to the circuit structure. The analyzed modified square wave inverter circuit has about 38% THD and 60% efficiency better than square wave inverter. The analyzed true sine wave inverter circuit having with about 10% THD and an efficiency of 75% has the most ideal output signal among the inverter types. Tests on resistive and inductive loads were carried out under laboratory conditions and output signals were observed with the help of Tektronix digital storage oscilloscope. Test results and simulation outcomes were confirmed to each other. It was found out that true sine wave inverter circuit is better and more efficient in many aspects compared to the modified and square wave inverter circuits in spite of their complicated structures and higher costs.
Interior design and decision making using augmented reality
Augmented reality is a new and trending technology across many fields of sectors. Technology is used mostly on commercial purposes. It eases the understanding as a teaching method and eases the perception of the 3d models while applying to reality. For example it is possible to see 3D modeled glass of milk on your kitchen table. It is not augmenting only 3D models but also videos, text and any kind of digital material. While working with augmented reality, a problem has been seen among furniture companies. It was, customers wanted to try the furniture before they buy it. So companies must send the furniture to customers for them to try it. This was causing a major transportation expense. Augmenting the furniture as photorealistic as possible in customers home via smart device is the aim of this thesis and the solution to the problem of the private sector. Providing this solution contains 2 parts in general. First is to develop a mobile app with augmented reality capabilities. It will have a user friendly GUI and drag and drop functionalities. The second part is providing the app with appropriate 3D models. 3D models of the furniture must be transformed into "fbx" file format using various of 3D design software. In the development process of the app "Vuforia SDK" will be assisting with the core functionalities for augmenting. It is an augmented reality SDK for developers that covers the tracking ability and some more features. The platform for the development will be "Unity 3D". Unity will be used because of its cross platform compiling capabilities. By that, final app will be available for iOS and Android at the same time. While developing with Unity 3D, programming language can differ to persons wish. It can be UnityScript(JavaScript), C# and Boo(Python like language).
An eg-ldpc based 2-dimensional error correction code for mitigating multibit upsets of sram memories
As SRAM memory chips manufactured with small feature size, low noise margins and low voltage level, MBUs (Multi Bit Upset) become the dominant contributor of the overall soft error rate. Therefore, Single Event Correcting–Double Event Detecting (SEC-DED) codes, such as Hamming codes, would be unable to mitigate the soft errors alone. Other conventional memory protection methods such as bit-interleaving in combination with SEC-DED codes and Triple Modular Redundancy (TMR) are not feasible either, as scaling up these techniques to cover large-scale MBUs will incur excessive increase in area, latency and power consumption of SRAM memories. One promising solution to mitigate MBUs with large widths is to construct two dimensional (2-D) ECC structures, which can provide scalable multi-bit error protection against large clusters of soft errors. Compared to conventional schemes with similar error coverage, 2-D ECC architectures offer significantly smaller latency, resource usage and power consumption figures. Recently, Euclidean Geometry Low Density Parity Check (EG-LDPC) codes are proposed to overcome effects of MBUs in memories. EG-LDPC codes have better multiple error correcting capabilities than conventional codes and they have low complexity and low delay decoders. Therefore, they are very suitable for fault tolerant memory applications. In this thesis, a 2-D error correction code architecture based on EG-LDPC and single parity check (SPC) code is proposed as a solution to MBU problem of SRAM memories. The proposed architecture uses (15, 7, 5) EG-LDPC as row encoding and SPC code for column encoding. In order to minimize decoding complexity and taking advantage of detection capability of 2D structure, a standard array decoder is utilized. The investigated architecture is compared with previously proposed Matrix code method. The proposed architecture is able provide over 95% error correction coverage up to 4 errors and a significant 100% error detection up to 12 bit errors. In terms of MTTFs, the proposed approach achieves 63% improvement over Matrix codes at fault rates of 10-4 and 10-5. Matrix codes and the proposed architecture are implemented using Xilinx XC6SLX16 FPGA (Field Programmable Gate Array) and comparison results in term of implementation complexity are provided.