Design of a low phase noise lc voltage controlled oscillator based on native transistors

One of the most preferred LC VCO topologies is complementary LC VCO. The topology has difficulty in providing sufficient current to the oscillator core in the current controlled oscillators due to the low voltage headroom. A fully integrated 7.5 GHz VCO is designed and simulated using TSMC 65 nm CMOS technology using native transistors for the biasing circuit to overcome this problem. Measured phase noise is -121 dBc/Hz for 1 Mhz offset at the center frequency. The oscillator has %5.58 tuning range. It draws 1.8 mA current from a 1.2 V supply. 2 dB better phase noise performance is obtained compared to peer circuit used normal transistors in biasing circuit.