Design and implementation of a current sensorless DSP based PFC circuit

Power factor is defined as the ratio of real power to apparent power. Assurance of unity power factor means efficient use of supplies and resources. According to the international standards, power factor correction (PFC) is mandatory on switch mode power supplies and on the devices with rectifiers at the input. The use of digital control in power factor correction applications eases implementation of complex algorithms, provides flexibility to the usage and simplifies circuit structure. In contrast, limited switching frequency is the drawback of digital control. This study aims to reach the performance of traditional PFC control techniques with a less calculating time and a low switching frequency. The baseline is to measure the load current which requires less sampling time compared with the measurement of input current in the traditional boost PFC systems. The control strategy is build on the condition of the desired input current waveform is known in advance as it is proportional to the input voltage sine waveform and it is able to be modelled in the control structure. The duty cycle signal is comprised of two parts; one of which providing voltage equilibrium while the other assuring unity power factor. Within the new approach, the amplitude of the duty cycle part assuring unity power factor is adjusted to appropriate values according to the amplitude of the voltage equilibrium part. These values are determined by the simulation. Interleaved boost structure has been chosen for the implementation in order to decrease the strain on the switching components and to provide load sharing. Utilizing Matlab/Simulink, the system has been simulated for 1500W, the THD has been obtained below 5% and unity power factor has been obtained. Within the application, the system has been digitally controlled by the eZdsp 2808 set resulting a unity power factor with a THD lower than 8% at a switching frequency of 20 kHz.