Development of ab inition models for carbon nanotube technology

Carbon nanotube (CNT) circuit components are promising elements for the post silicon Very Large Scale Integration (VLSI) technology. Research on CNT components and circuits are advancing rapidly. Circuits produced in CNT technology are proven to provide high current density and ballistic transport in a small area. Despite the advancements in CNT circuit technology, accurate and versatile models for CNT interconnects and CNT field effect transistors (CNTFETs) are missing in the literature. This thesis is aimed to fill in this gap.Firstly, electronic properties of CNTs are given as a basis in the introduction section. After section 2, in which related works in the literature are reviewed, material and methods for analysing CNT nanodevices are explained. The goals of this thesis are given in the results and discussions section.The variation of CNT resistance with the applied voltage is obtained using self-consistent atomic simulations and then a polynomial model suitable for use in VLSI design and simulation tools is developed in the first subsection. Secondly, a neural network model for the nonlinear resistance-voltage variation of metallic CNTs is given. Utilization of the saturated current-voltage characteristics of metallic CNTs is then presented as a novel nanoscale design concept with example circuits and HSPICE simulations. Fourthly, a voltage-dependent capacitance extraction method for CNTs using self-consistent simulation results is provided with results. In the next subsection, metallic CNTs are modelled as transmission lines employing voltage-dependent resistance and voltage-dependent capacitance, then the delay through the CNT is calculated accurately with comparison to the delay calculation obtained by different methods. A CNTFET model utilizing self-consistent simulation method to calculate the channel charge accurately and suitable for use in SPICE is presented in the sixth subsection. Finally, example circuit simulations using the proposed CNTFET model are provided. The overall work is reviewed in the conclusions section.