SMPS buck converter design for portable devices

This thesis develops estimation and efficiency maximization techniques in Synchronous SMPS Buck Converters. The target applications are voltage regulators for microprocessors used in battery powered systems. Overall system efficiency is a critical design parameter in battery powered systems. It affects both the battery capacity requirement and the end product's run time.The circuit that delivers power to the microprocessor is usually called a Voltage Regulator Module (VRM). The preferred architecture for this power converter is the buck converter with synchronous rectification. This architecture reduces the ripple both of the output voltage and the input current, allowing for smaller filter components. Because of switching and components used in converters, power losses emerge. Losses that appear in every stage of switching buck converters are investigated. Gate drive optimisation and efficiency maximization techniques are introduced. To obtain higher efficiency at light loads, some control circuits should be used. Pulse Frequency Modulation(PFM) is a control method to stabilize output voltage by improving power supply efficiency at light loads. Besides, some short circuit protection methods are mentioned.At every stage of thesis, experimental results are presented, showing maximized efficiency even at light load, and optimized gate drive on Intel Montevina Platform Notebook Computer Double Data Rate (DDR) Memory voltage rail.