Using sram bit cells with built-in comparators to protect the register file against soft errors

Soft errors caused by cosmic rays or alpha particles are becoming an increasingly important challenge in reliable microprocessor design. Transistor density, and die size trends show that soft errors will gain even more importance in the future. Due to their significant overheads, most common redundancy schemes used for protection against soft errors are not suitable for the register file which is a critical component for performance. Most contemporary processors employ a large physical register file to hold the produced results which may reside there for a long time. The register file is a crucial element of a microprocessor and is needed to be protected against soft errors. In this thesis, a modification to the design of the SRAM bit cells used to implement the register file is proposed to hold a redundant copy of the data and compare the two copies using built-in comparators to detect a possible bit fault. It is shown by experimental evaluations that the proposed design has low area, power and delay overheads and can protect the register file against soft errors.