Variable frequency inverter design and application

Inverters designed at different frequencies and different power values are generally used with fixed switching frequency PWM (CSFPWM). The switching frequency preferred in inverter designs directly affects the switching losses. Therefore, it also affects the efficiency of the inverter. For this reason, low efficiency is obtained due to the increase of switching losses in inverters designed and operated at high frequencies. In this thesis, variable switching frequency (VSFPWM) inverter design and application, which has an advantage over CSFPWM and has not been used before in the literature, has been carried out. When the inverter is operated with the VSFPWM method used in the thesis, it has been observed that there are less switching losses compared to CSFPWM and the total efficiency of the circuit is higher. The switching range used in the VSFPWM method is selected at a lower range than CSFPWM. In the VSFPWM method, which is obtained by taking the sinusoidal voltage generated at the output of the inverter as a reference, the frequency range varies according to the bottom points and the upper points of the sinusoidal curve. The MOSFET power switch of the inverter designed in the simulation studies was defined by the Sheet-Scan module in ANSYS / Simplorer program to be the same model as the MOSFET power switch model used in the real application. In all studies (simulation and experimental), loss, efficiency and THD comparison of the circuit for both CSFPWM and VSFPWM has been made. MATLAB / Simulink and ANSYS / Simplorer programs were used in the simulation studies. In the experimental study, FPGA board was used for VSFPWM switch triggers. From the results obtained, it was seen that the simulation and experimental results were compatible with each other and it was concluded that the proposed method (VSFPWM) is more advantageous for inverter switching. Keywords : Inverter, CSFPWM, VSFPWM, FPGA, THD