Producing of pulse width modulated signals using field programmable gate arrays and dc motor application

In this thesis, Pulse Width Modulation (PWM) signals of 1-16 kHz variable frequencies and variable duty cycles are produced by using Xilinx XC3S500E-4FG320 Field Programmable Gate Arrays (FPGA). VHDL (Very High Speed Integrated Circuit Hardware Description Language VhsicHDL), hardware description language, is used for programming FPGA. The produced PWM signals are applied to the drive circuit of a direct current motor and thus, the defined operation speeds are achieved. The motor speed is obtained by a disc attached motor shaft and an optic transducer, and is displayed on digital display (LCD). The produced PWM signals are both simulated using Xilinx programming interface unit and validated by observing the oscilloscope screen.