Digital filtering for communication signals using FPGA technology

Base element of digital systems which are used in a very wide area between daily life and or hi-tech research applications is ICs (Integrated Circuits). There are several technologies for designing and producing these IC?s which are used for several applications.FPGA (Field Programmable Gate Array) is a new technology which provides a different new way to develop these integrated circuits. It is produced by a few companies around the world and common property of these FPGA?s is they can be configured by the hardware descriptive languages Verilog and VHDL (Verilog Hardware Descriptive Language) which have base standards. Filtering of digital signals on implemented hardware using these languages is explained in this thesis.Together with explanation of developed filter which is created by VHDL command lines, algorithm of serial communication modules which are needed for data communication in the project like transmitter, receiver and delayer are also explained in this thesis.To test the constructed modules in FPGA digital data is transmitted and received through serial port of FPGA. Audio files which have specific sampling frequency and bit depth are used for testing filtering characteristics.In addition, subjects like algorithm of VHDL modules, digital filter construction, module instantiation, differences of filter architectures and design process are explained and results are compared. Also several software are used in the design process and it is explained how to use them in this thesis.