FPGA based narrow band BPSK PLC modem design and simulation

According to the developing technology in communication systems, the need for economic infrastructure that can respond to users at all levels without interruption is increasing day by day. This situation necessitates the use and development of various methods in communication technologies. Communication over the power line (PLC) technology is one of the powerful communication alternatives that is widely used in many fields today. PLC channel requires flexible and adaptive PLC modem design due to its high attenuation and variable characteristics. For this reason, FPGA (Field Programmable Gate Array) based systems with flexible structured gate arrays, short design time, and user reprogrammability are considered as a low-cost, flexible and practical solution for PLC modem design. In this thesis study; With the binary phase shift keying (BPSK) modulation technique, a flexible BPSK-PLC modem design with 100 kHz frequency carrier according to the narrow band in the CENELEC standard has been made. Simulation studies for BPSK modem design were carried out first in the MATLAB® environment and then in the Xilinx supported Vivado environment using the VHDL (Very High Speed Integrated Circuit Hardware Description Language) software language. The results showed that the created FPGA-based BPSK-PLC modem is compatible with the PLC communication system.