Investigation of novel memristor-memtransistor devices for potential neuromorphic computing applications via alternative synthesis routes

As the need for faster and more efficient data processing grows particularly with the rise of artificial intelligence (AI) applications conventional Von Neumann architectures face fundamental limitations due to the separation of memory and processing units. Memristors and memtransistors offer a promising alternative by enabling unified memory-computation architectures and emulating key features of biological synapses, making them strong candidates for neuromorphic computing. In this context, two-dimensional (2D) materials, such as transition metal dichalcogenides (TMDs), stand out for their atomic thickness, electrostatic tunability, and defect engineering flexibility, all of which are critical for implementing low-power, high density, and scalable memristive devices. However, challenges remain in achieving stable and reproducible switching behavior, largely due to defect-driven mechanisms such as ion migration, phase transitions, and filamentary conduction. This thesis explores two experimental strategies to address these challenges using alternative fabrication methods. First, memtransistor structures based on monolayer MoS₂ were fabricated via chemical vapor deposition (CVD), and the effect of channel length on synaptic behavior and electrical performance was systematically investigated. The findings highlight how device geometry influences neuromorphic functionalities. Second, a novel fabrication route was developed for titanium-based memristors using plasma enhanced atomic layer deposition (PEALD). While full MXene formation is still under study, the resulting crystalline TiC phase was successfully integrated into a vertical memristor structure, exhibiting reliable resistive switching and short-term synaptic plasticity. Together, these results demonstrate the potential of 2D-material-based memristive systems for neuromorphic computing and provide insight into tunable, scalable, and CMOS-compatible fabrication routes.